digital gamma finderThe DGF Pixie-16 is a 16-channel data acquisition system for nuclear physics and other applications requiring coincident radiation detection with large number of channels, and offers the following advantages:

  • Digital spectrometry and waveform analysis for 16 input signals per module
  • Coincident data acquisition across channels and modules
  • Up to 500 MSPS sampling rate
  • PXI data transfer rates up to 109 MB/sec




Based on the CompactPCI/PXI standard, the Pixie-16 is a 16-channel Digital Pulse Processor designed for fast coincidence gamma-ray spectroscopy, and used in a variety of nuclear physics applications including:

  • Segmented HPGe detectors
  • Silicon Strip detectors
  • Scintillation detector arrays
  • Synchronous waveform capture for gamma-ray tracking
  • Sub-nanosec timing measurements

More about Applications…


Technical Data

The Pixie-16 provides digital spectrometry and waveform acquisition for 16 input signals per module; several modules can be combined into a larger system. The Pixie-16 is based on the CompactPCI/PXI standard which allows data transfer rates from Pixie-16 memory to the host computer of up to 109MByte/s. Commercial PXI/CompactPCI modules – DSP processor boards, HV supplies, embedded host computers – can be added to build a flexible standalone data acquisition and analysis system.

Each channel of the Pixie-16 accepts signals from virtually any radiation detector that has an exponential decay output. Incoming signals are digitized with 14 or 16-bit, 100 or 250 or 500 MSPS ADCs. Digitally controlled offsets can be individually adjusted for each channel. While the voltage gain is fixed to a factory set value, there are two software selectable attenuation factors as well as jumper selectable 50 Ω input termination. Triggering, pile-up inspection and filtering of the data stream is performed in real time; pulse
heights and other event data is calculated on an event-by event basis. Results are stored in 512K of spectrum memory and 128K of list mode FIFO memory.

The Pixie-16 module(s) can be controlled either by an in-crate CompactPCI/PXI embedded computer or through a CompactPCI/PXI bridge by a desktop computer. The Pixie-16 is operated through a simple graphical user interface running on Windows. A C driver library, compatible with Linux, is provided for users who plan to integrate Pixie-16 modules into a  custom data acquisition system.

The Pixie-16 is operated in a custom made 6U CompactPCI/PXI chassis with high current power supplies. The lower half of the chassis backplane provides a PCI data interface compatible with the 3U CompactPCI/PXI standard. The upper half of the backplane provides high current power connections and more than 150 lines for clock, trigger and data distribution between modules.


  • 14-16 bit, 100-500 MSPS digitizing of input signal
  • 32bit/33MHz PCI interface with module-to-host transfer rates up to 109MB/s
  • Simultaneous amplitude measurement and pulse shape analysis for each channel
  • Pulse heights measured with up to 16 bits accuracy on each of the four channels
  • Waveform acquisition up to 163us, 65us or 40us for 100, 250 or 500 MSPS, respectively.
  • 32K x 32bit on-board spectrum memory for each channel
  • 128K x 16bit additional on-board FIFO memory for continuous readout of list mode data
  • Fixed gain, adjustable input offset, trigger and energy filter parameters
  • Coincident data acquisition across channels and modules
  • Triggers, run synchronization and clocks distributed over PXI backplane
  • Graphical user interface and C-based driver libraries
  • Operated through in-crate single board PC or through bridge from desktop
  • Can be combined with commercial CompactPCI/PXI processor, power, and computer modules
  • Mixed Pixie-16 variant (14-16 bit, 100-500 MSPS) systems with different detector types



Analog Sixteen preamplifier inputs, switchable input impedance and attenuation:
50 Ω or 1 kΩ or 4 kΩ (or according to user specification)
Full scale range +/-2V (Not to exceed +/-3.5V if terminated with 50 Ohms and attenuation is not used)
Works with common resistive feedback preamplifiers of either signal polarity
Digital 28 digital inputs/ouputs, including:
4 high speed LVDS input/output connections
16 LVDS inputs for channel specific gating
LVTTL inputs and outputs for general purpose Option for external clock through front panel input. In addition, there are more than 160 digital lines on the backplane for low skew system clock distribution, trigger, run synchronization, and global veto lines, and complex trigger logic, multiplicity information, or data transfers between modules.

Data I/O

Interface Compact PCI/PXI standard, 33 MHz, 32-bit
Data Transfer Rate Memory readout to host: 109 MByte/sec

Digital Controls

Gain Fixed voltage gain set to user specification, digital gain adjustement +/- 10%.
Offset -1.5V to +1.5V in 65536 steps
Filtering Rise time and flat top: 0.02 to 80 μs in small steps
Adjustable flat top to eliminate ballistic deficit effects
Pileup Fast channel filter time, pulse detection threshold, and fast channel pileup inspection test limits may be set independently to achieve best results in every gamma-ray energy regime
Data collection MCA limits and number of bins, waveform lengths

Data Outputs

MCA 1024 to 32,768 channels (32 bits deep) per Pixie channel
List Mode Time stamp (48-bit), energy, optional waveforms and QDC sums for each event stored in 128K (16-bit) FIFO for uninterrupted data acquisition
Timing Events are time stamped with 100 or 125 MHz clock in list mode with fractional constant fraction discriminator (CFD) time that is captured at full ADC clock rate (100 or 250 or 500 MHz)
Statistics All values required for pileup correction are available: livetime, realtime, input events, output events
Diagnostics ADC trace, baseline distribution, baseline history, FFT noise spectrum